Microwind 3.8 Software In The

Chapter 2 describes the technology scale down and the major improvements given by deep sub-micron technologies.

Introduction About the author ETIENNE SICARD was born in Paris, France, in June He received a B.S degree in 1984 and a PhD in Electrical Engineering in 1987 both from the University of Toulouse.

He was granted a Monbusho scholarship and stayed 18 months at the University of Osaka, Japan.

Previously a professor of electronics in the department of physics, at the University of Balearic Islands, Spain, E.

Sicard is currently a professor at the INSA Electronic Engineering School of Toulouse.

Microwind 3.8 Software In The

Etienne SICARD is the author of several commercial software in the field of microelectronics and sound processing.

Also, I would like to thank Marie-Agnes Detourbe for having carefully reviewed the manuscript.

This software is dedicated to John Uyemura, from Georgia Tech, Usa, who was an unconditional fan of Microwind.

ISBN 1203 3 1. Introduction Table of Contents 1 Introduction Installation.

INSTALLATION Technology Scale Down Evolution of Microprocessors and Memories Frequency Improvements Increased Layers Design Trends Exercises The MOS device Logic Levels The MOS as a switch Logic Simulation of the MOS MOS layout Vertical aspect of the MOS Static Mos Characteristics Dynamic MOS behavior Analog Simulation Layout considerations The MOS Model The MOS Model The BSIM4 MOS Model Low leakage MOS High voltage MOS Temperature effects on the MOS The PMOS Transistor Process Variations The Transmission Gate The Inverter The Logic Inverter THE CMOS INVERTER MANUAL LAYOUT OF THE INVERTER Connection between Devices Useful Editing Tools Metal-to-poly Supply Connections Process steps to build the Inverter Inverter Simulation STATE INVERTER Exercises Basic Gates Introduction The Nand Gate The AND gate 1203 4 1.

Introduction 5.4 The 3-Input OR Gate The XOR Gate Complex Gates Multiplexor to 1 Multiplexor Interconnects and Vias Exercises Arithmetics Unsigned Integer format Creating Arithmetic Circuits From Logic Design Half-Adder Gate Full-Adder Gate Full-Adder Symbol in DSCH Full-Adder Layout Four-Bit Adder Comparator Arithmetic and Logic Unit Model of the PIC 16f Latches Basic Latch RS Latch D Latch Edge Trigged Latch Counter Memory Circuits The world of Memory RAM Memory RAM Array Row Selection Circuit Column Selection Circuit A Complete 64 bit SRAM Dynamic RAM Memory EEPROM Double-gate MOS Charge Double-gate MOS Discharge Flash Memories Ferroelectric RAM memories Memory Interface EXERCISES Analog Cells Resistor Capacitor Diode Capacitor Mos Capacitor Poly-Poly2 Capacitor Inter-Metal Capacitor Diode-connected MOS Voltage Reference Current mirror Amplifier Simple Differential Amplifier 1203 5 1.

Introduction 9.11 Push-Pull Amplifier Exercises Radio Frequency Circuits On-Chip Inductors Inductor Design in Microwind Power Amplifier Oscillator Voltage Controlled Oscillator Phase-lock-loop Phase Detector Filter Voltage controlled oscillator for PLL Complete Phase Lock Loop Gilbert Mixer Exercises Converters Introduction Digital-Analog Converters architectures Resistor string converter R-2R ladder converter Sample and Hold circuits Analog-Digital Converters architectures The Flash converter Principles Low speed ADC Converters Exercises InputOutput Interfacing Power Supply The Bonding Pad The Pad ring The supply rails Input Structures High voltage MOS Input pad with Schmitt Trigger Digital Output Structures Level shifter COREPAD LIMITATION IO Pad description using Ibis Design Rules Select a Design Rule File Start Microwind with a specific design Rule File Lambda Units N-Well Diffusion Polysilicon nd Polysilicon Design Rules MOS option Contact Metal 1203 6 1.

Introduction Via Metal Via Metal Via Metal Via Metal Via Metal Pads Electrical Extraction Principles Node Capacitance extraction SURFACE CAPACITANCE INTER-LAYER CROSSTALK CAPACITANCE LATERAL CROSSTALK CAPACITANCE Parameters for Vertical Aspect of the Technology Resistance Extraction Dielectrics Simulation Parameters Models Level1 and Level3 for analog simulation BSIM4 Model for analog simulation Technology files for DSCH Design Rule File Microwind2 Menus FILE MENU VIEW MENU EDIT MENU SIMULATE MENU COMPILE MENU ANALYSIS MENU PALETTE NAVIGATOR WINDOW LIST OF ICONS Microwind2 Simulation menu Dsch2 Menus Edit Menu Insert Menu View Menu Simulate Menu Symbol Palette List of Files List of Measurement Files Measurement file example References 1203 7 1.

About Dsch2 About Microwind2 The DSCH2 program is a logic editor and simulator.

DSCH2 is used to validate the architecture of the logic circuit before the microelectronics design is started.

DSCH2 provides a user-friendly environment for hierarchical logic design, and fast simulation with delay analysis, which allows the design and validation of complex logic structures.

Some techniques for low power design are described in the manual.

DSCH also features the symbols, models and assembly support for 8051 and 18f64.

The MICROWIND2 program allows the student to design and simulate an integrated circuit at physical description level.

The package contains a library of common logic and analog ICs to view and simulate.

MICROWIND2 includes all the commands for a mask editor as well as original tools never gathered before in a single module (2D and 3D process view, VERILOG compiler, tutorial on MOS devices).

You can gain access to Circuit Simulation by pressing one single key.

The electric extraction of your circuit is automatically performed and the analog simulator produces voltage and current curves immediately.

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